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Nama	Ukuran	Aksi
arch_hweight.h	555 B	View DL Edit
atomic.h	1.64 MB	View DL Edit
builtin-ffs.h	374 B	View DL Edit
builtin-fls.h	412 B	View DL Edit
builtin-__ffs.h	379 B	View DL Edit
builtin-__fls.h	436 B	View DL Edit
const_hweight.h	1.67 MB	View DL Edit
ext2-atomic-setbit.h	403 B	View DL Edit
ext2-atomic.h	600 B	View DL Edit
ffs.h	654 B	View DL Edit
ffz.h	325 B	View DL Edit
fls.h	683 B	View DL Edit
fls64.h	860 B	View DL Edit
hweight.h	254 B	View DL Edit
instrumented-atomic.h	2.99 MB	View DL Edit
instrumented-lock.h	2.62 MB	View DL Edit
instrumented-non-atomic.h	4.67 MB	View DL Edit
le.h	1.3 MB	View DL Edit
lock.h	2.58 MB	View DL Edit
non-atomic.h	3.86 MB	View DL Edit
sched.h	760 B	View DL Edit
__ffs.h	777 B	View DL Edit
__fls.h	920 B	View DL Edit

Edit file: /usr/src/kernels/5.14.0-427.31.1.el9_4.x86_64/include/asm-generic/bitops/non-atomic.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_GENERIC_BITOPS_NON_ATOMIC_H_
#define _ASM_GENERIC_BITOPS_NON_ATOMIC_H_

#include <asm/types.h>
#include <asm/barrier.h>

/**
 * arch___set_bit - Set a bit in memory
 * @nr: the bit to set
 * @addr: the address to start counting from
 *
 * Unlike set_bit(), this function is non-atomic and may be reordered.
 * If it's called on the same region of memory simultaneously, the effect
 * may be that only one operation succeeds.
 */
static __always_inline void
arch___set_bit(int nr, volatile unsigned long *addr)
{
	unsigned long mask = BIT_MASK(nr);
	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);

*p  |= mask;
}
#define __set_bit arch___set_bit

static __always_inline void
arch___clear_bit(int nr, volatile unsigned long *addr)
{
	unsigned long mask = BIT_MASK(nr);
	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);

*p &= ~mask;
}
#define __clear_bit arch___clear_bit

/**
 * arch___change_bit - Toggle a bit in memory
 * @nr: the bit to change
 * @addr: the address to start counting from
 *
 * Unlike change_bit(), this function is non-atomic and may be reordered.
 * If it's called on the same region of memory simultaneously, the effect
 * may be that only one operation succeeds.
 */
static __always_inline
void arch___change_bit(int nr, volatile unsigned long *addr)
{
	unsigned long mask = BIT_MASK(nr);
	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);

*p ^= mask;
}
#define __change_bit arch___change_bit

/**
 * arch___test_and_set_bit - Set a bit and return its old value
 * @nr: Bit to set
 * @addr: Address to count from
 *
 * This operation is non-atomic and can be reordered.
 * If two examples of this operation race, one can appear to succeed
 * but actually fail.  You must protect multiple accesses with a lock.
 */
static __always_inline int
arch___test_and_set_bit(int nr, volatile unsigned long *addr)
{
	unsigned long mask = BIT_MASK(nr);
	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
	unsigned long old = *p;

*p = old | mask;
	return (old & mask) != 0;
}
#define __test_and_set_bit arch___test_and_set_bit

/**
 * arch___test_and_clear_bit - Clear a bit and return its old value
 * @nr: Bit to clear
 * @addr: Address to count from
 *
 * This operation is non-atomic and can be reordered.
 * If two examples of this operation race, one can appear to succeed
 * but actually fail.  You must protect multiple accesses with a lock.
 */
static __always_inline int
arch___test_and_clear_bit(int nr, volatile unsigned long *addr)
{
	unsigned long mask = BIT_MASK(nr);
	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
	unsigned long old = *p;

*p = old & ~mask;
	return (old & mask) != 0;
}
#define __test_and_clear_bit arch___test_and_clear_bit

/* WARNING: non atomic and it can be reordered! */
static __always_inline int
arch___test_and_change_bit(int nr, volatile unsigned long *addr)
{
	unsigned long mask = BIT_MASK(nr);
	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
	unsigned long old = *p;

*p = old ^ mask;
	return (old & mask) != 0;
}
#define __test_and_change_bit arch___test_and_change_bit

/**
 * arch_test_bit - Determine whether a bit is set
 * @nr: bit number to test
 * @addr: Address to start counting from
 */
static __always_inline int
arch_test_bit(int nr, const volatile unsigned long *addr)
{
	return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
}
#define test_bit arch_test_bit

/**
 * arch_test_bit_acquire - Determine, with acquire semantics, whether a bit is set
 * @nr: bit number to test
 * @addr: Address to start counting from
 */
static __always_inline bool
arch_test_bit_acquire(unsigned long nr, const volatile unsigned long *addr)
{
	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
	return 1UL & (smp_load_acquire(p) >> (nr & (BITS_PER_LONG-1)));
}
#define test_bit_acquire arch_test_bit_acquire

#endif /* _ASM_GENERIC_BITOPS_NON_ATOMIC_H_ */

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